Job Description

Epitec is seeking an experienced CAD Engineer to join our client in the Tech Industry in Austin, TX. As a CAD Engineer, the candidate will play a pivotal role in supporting power analysis and optimization efforts, helping analyze power metrics, improve existing flows, and work with design teams to identify and address power-related issues in advanced chip designs.

• This is an ongoing W2 contract with potential for conversion
• This is a hybrid position in Austin, TX

Top Responsibilities

• Perform end-to-end power analysis across the RTL-to-GDSII design flow at multiple stages of the design lifecycle
• Develop, enhance, and automate power analysis and modeling flows, including largescale data collection and analysis
• Identify power inefficiencies and provide clear, actionable recommendations to RTL and design teams
• Drive power reduction strategies using industry-standard tools and low-power methodologies
• Collaborate cross-functionally with RTL, physical design, and software/firmware teams to optimize power performance
• Build and maintain scalable, data-driven models for power estimation and runtime analysis

Top Qualifications

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or Computer Science (Master’s preferred)
• Strong experience with RTL-to-GDSII design flows in advanced technology nodes (7nm and below)
• Deep expertise in low-power implementation and signoff techniques, including power gating, multiple voltage rails, and UPF
• Proven hands-on experience with power analysis and reduction using industry tools such as PrimeTime PX and PrimePower
• Proficiency in Python scripting, with experience applying ML/AI techniques for automation, analysis, or modeling
• Solid understanding of RTL design principles and RTL-level power optimization
• Experience using RTL power optimization tools such as Power-Artist
• Ability to work independently, learn quickly, and iterate on new ideas in a fast-paced environment

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